Today, memory device testing is either done by built in self-test (BIST)-modules, by special test-access modules or by using the central processing unit (CPU) or controller, for example a micro-controller, of an integrated circuit (IC) which contains the memory device.
If BIST is selected, then additional hardware blocks are added to the circuit to speed up memory testing. This is the same for special test-access modules, here also additional hardware blocks and test-pins are required.
In systems housing a CPU or controller the memory device testing can be done by using the CPU. This approach can substitute the BIST logic with the advantage of reducing the overall gate count of the system. However, using the CPU for testing has often the drawback of higher test-time, because usually more than one CPU instruction is needed to verify one data word within the memory device to test.